Preparing for the first post-pandemic offering of CSC258H1

My first opportunity to teach Computer Organization came in the Fall of 2022. The course traditionally (i.e., pre-pandemic) taught a hardware description language (Verilog). With the pandemic drawing to a close, the course was transitioning back to in-person. But the decision was made to not return to teaching Verilog. Instead, the course would continue to teach digital hardware at the gate level using a tool called Logisim Evolution.

Logisim Evolution saw a lot of activity over the pandemic since many labs were closed. So, lots of new features were added in a (relatively) short amount of time. And one of those features was the ability to synthesise a Logisim Evolution circuit onto an FPGA, which is physical hardware we now had access to in the labs.

Over the summer, I worked with Professor Steve Engels and teaching assistant Ava Danialy. Our main goal was to see how (and to what extent) the Logisim Evolution could be adapted to the in-person labs. In the end, we had a good idea of which circuits students developed in the lab could be successfully synthesised on the FPGA boards found in the labs.

While Ava worked diligently in the lab, I focused on the lab materials. One major contribution was standardizing how lab reports were submitted. Leveraging what I learned from CSC110Y1 and CSC111H1, students are now provided with a Latex template for their lab report. This template produces a PDF file that has the same structure (though different content) for every student, making it significantly easier to grade. I also worked on other things, like improving the lab handouts and creating TA-facing lab materials.